N2VY: January 2022

Caution: This project is in the design and simulation stage. Changes will be made as prototyping, building, testing, evaluation and commissioning proceeds.

Basic Design Ideas

I started with the power stage design as described in the Micro Semi App Note and as modified by Jeff Anderson, K6JCA. My first step was to build a simulation model. After some trial and error with Mac Spice, I learned that it does not do a great job with simulating transformers and transmission lines. Since transmission line transformers are an important part of the design, this was limiting. Around the same time, I had contacted Jeff Anderson, K6JCA, to see if he would help me with the design which he graciously agreed to do. He also told me about LT Spice which proved to be the tool I needed.

I have made two changes to the Micro Semi app note design. The first is that I have changed from VRF2944 to MRF300 FETs. My primary motivator was the price difference, but there are implications to this decision.

MRF300 breakdown voltage is 133 volts (vs. 180 volts for VRF2944) and the MRF300 parameters are specified at 50 volts DC drain voltage. Since the drain voltage swings twice the supply voltage, using 62 volts power supply and 4:1 impedance ratio output transformers is not practical. Following the Micro Semi app note calculations, I have gone with lower drain voltage and 9:1 impedance ratio output transformers. The calculated power supply voltage is 39 volts, but Spice simulation showed very poor (-28 dB) harmonic distortion (this is consistent with K6JCAs experimental results). Increasing the supply voltage to 40 volts improved harmonic distortion (at least on the simulator) to -36 dB at 28 MHz and -43 dB at 21 MHz and lower frequencies. So after an email exchange with Jeff, I chose to use the Mean Well 48 volts power supply. My initial simulations suggested the need for a 1,500 watt power supply, but as I will discuss later, a 1,000 watt power supply will work. The Mean Well power supply also has an auxiliary 12 volts 400 mA output which is handy.

Another implication of this change in FET selection is the thermal design. Junction to case thermal resistance of VRF2944 is 0.22 degrees C per watt. For MRF300, it is 0.55 degrees C per watt. I have a section on thermal design below.

The advantage that I get by using MRF300, in addition to the price is much lower capacitance. Specifically, Ciss 403 pf vs. 1050 pf, Coss 104 pf vs. 520pf, and Crss 2.3 pf vs. 62pf (note the Miller effect difference). I think this is going to make for an easier-to-control circuit.

Impact of Path Inductance

Another change I made is the layout of the Micro Semi circuit. I started first by following exactly the same layout. I extracted the inductance of the paths and put them back into the simulator. The inductance in the feedback path played havoc with the gain and input impedance at higher frequencies. So, I put a capacitor in parallel with the feedback path inductance to flatten the response and got a much better behaved amplifier as one would expect. The path inductance was 0.0411 micro Henry which is 7 ohms at 28 MHz and that is a big percentage of the feedback resistors. The re-layout of the circuit brought the feedback path inductance to 0.00116 micro Henry and the gate path inductance to 0.00012 micro Henry. I got flat gain (within 1 dB) across all bands and the amplifier input impedance stayed close enough to 50 ohms to keep SWR in all cases less than 1.4 at the input (on the simulator still).

I think the circuit changes that Jeff made to make the amplifier meet specifications are partly because of the path inductances in the Micro Semi layout.

The Simulator

Below is an example of one of my LT Spice simulation schematic followed by the net list. Here are a few points about the simulation model. There is plenty of information about LT Spice on the web mostly from Analog Devices.

The FET model is the basic input, output, and feedback capacitances from the data sheet and a voltage controlled current source. The current source is a piecewise linear approximation to the drain current as a function of the gate voltage. I did my best to approximate the shape of the curve from the data sheet (which is not as clear as the Micro Semi VRF2944 data). Jeff, K6JCA, has a detailed discussion of how this effects distortion especially at low power levels.
This particular model is for the results shown below. For simulating intermodulation and harmonic distortion, it is probably best to take out the coax cable between the directional coupler and the load.
When terminating a cable (transmission line) in something other than its characteristic impedance, its input impedance (at the amplifier output) changes and this change depends on the frequency, length, and construction of the cable. Be mindful of this as you run the simulations.

In the simulator, the DC bias current is 195 milliamperes. In real life, it might have to be around 300 to 350 mA. The intermodulation and the harmonic distortions are way better than the requirements. But that is because it is a simulated model and not the physical device. At some point, I may be able to find a more realistic model, but for now, I will wait until I start testing the actual circuit (for these two simulations, I took out T4, the 100 meters of RG8X coax cable represented by the 50 ohm 410 ns delay, between the directional coupler and the load).

Or maybe these transistors and the circuit around them are so good that I can do without low pass filters. I will test this hypothesis.

Impact of Low Pass Filter

Where the simulator proved invaluable are in two areas. One is that it helped establish/validate the protection threshold for the forward and reflected voltage output of the directional coupler (to be verified with the actual circuit). The other is that it helped me uncover that the input impedance of some of the W6PQL low pass filters when terminated with 50 ohms were not anywhere close to 50 ohms. For example, at 21MHz, the power supply current consumption was in the range of 18.2 to 18.5 amperes (efficiency in the 55% to 59% range), which is good. At 28 MHz, the power supply current was in the 23.1 to 24.4 amperes (efficiency in the 41% to 50% range), which is not good. The input impedance of the amplifier at 21 MHz was 48.5 + 7.8j (close to the target) and at 28 MHz it was 60.9 + 4.1j (not close to the target) both with a 50 ohm load at the output.

A similar inefficiency was observed at 3.5 MHz.

Upon investigation I found that the input impedance of the W6PQL low pass filter when terminated with a 50 ohm load in the case of 21 MHz was 50.4 - 10.3j and in the case of 28 MHz the input impedance of the filter was 35.9 - 15.8j. Lower load impedance will require a higher current to produce the required voltage and power into 50 ohm load, hence the lower efficiency and higher current.

The 21 to 30 MHz filter was redesigned such that the input impedance at 21 MHz was 50 ohms pure resistive with no reactive component and at 28 MHz it was 48.6 + 3.7j. After this change, at 25 volts of input for both frequencies the power supply current was in the range of 17.4 to 19.6 amperes, the efficiency in the rage of 51% to 66%. Input impedance of the amplifier with a 50 ohm load at the end of the cable was now 47.3 + 2.4j at 21 MHz and 44.9 + 2.7j at 28 MHz. Output power was 538 watts at 21 MHz and 557 watts at 28 MHz. Similar results were were obtained at 3.5 MHz.

The change in the filter design lowered the power supply power consumption under 1,000 watts.

The schematics for the power and supervisory circuits are lower down on this page.

Power Output and Internal Voltages

I have included a few sample simulation result below. This simulation is for the bottom end of each ham band (I have simulated other points along the band, but due to the narrowness of the ham bands, not much changes over the range). The input voltage to the amplifier is 24 volts peak through a 50 ohms source. The load column is the various loads that I simulated. The primary and secondary voltage columns are from the primary and the secondary of the transformer. The output voltage is the output of the low pass filter after the directional coupler. The load voltage is the voltage at the indicated load (first column) at the end of 100 meters of RG8X simulated coax cable. Vfor and Vref are the forward and reflected voltage outputs of the directional coupler after the output low pass filter (the attenuation for these two paths in this simulation is not the same. See the directional coupler section for the correction). Idd is the simulated power supply current. Gamma (reflection coefficient) and SWR are calculated value based on the line and load impedance. They are used to calculate the forward and reflected voltage from the simulation data. power is the power delivered to the load. "D" in the last column indicates that the amplifier overloaded and clipping occurred.

The simulated output power varies a bit across the ham bands as can be seen from the tables below. I have decided to live with it and not use the compensation circuit used in the Micro Semi app note (the 10 ohm resistor in parallel with 2200 pf capacitor in the gate path). In my early simulations it had negative effect in controlling the amplifier input impedance across the bands. From his blog, Jeff (K6JCA) also eliminated the capacitor.

Power Consumption, efficiency and Input Impedance

The tables following the power and directional coupler outputs are the power consumption and the amplifier input impedance data. 48V power is the simulated supply current times 48 volts. That is that the data that helped me conclude that I can make do with a 1,000 watt power supply (it is less expensive and also smaller). Efficiency is the power output divided by 48V power. Excess power is the difference between 48V power and the output power. Per FET is excess power divided by two. Mag Zin, Re Zin and ImZin are the magnitude, real and imaginary parts of the input impedance. I will spare the reader of another Excel table, but as you see from the input impedance, except the cases of 7, 14, and 21 MHz with 85 ohm load where the reflected power and SWR are both too high. Again, I will like to note that the impedance seen by the output of the amplifier is very much a function of the length of the cable, frequency, and the cable construction.

Thermal Design

The recommended thermal design from the Micro Semi app note (and other vendors app notes) is to mount the transistors on a 3/8" copper plate heat spreader that is mounted on a large aluminum extrusion heatsink with 100 CFM of airflow.

Maximum junction temperature of MRF300 FET is specified at 175 degrees C. I will assume an ambient temperature at 25. This yields a 150 degree junction temperature rise. The MRF300 thermal resistance is 0.55 degrees C/watt. The thermal resistance of the larger heatsink sold by Communication Concepts Inc with good airflow is 0.2 degrees C/watt (from MyHeatSinks calculator). The Delta fan that I am planning to use can drive this volume with 0.3 inches of H2O air pressure.

The thermal conductivity and screw pressure data is from Engineers Edge website.

Thermal conductivity of copper is 390 W/m-K so a 3/8" thickness of 6.5"x8" copper (also from Communication Concepts) has a thermal resistance of 0.00073 degrees C/watt. This can be ignored.

The copper heat spreader to heatsink interface has a thermal conductivity of 12,000 W/m sq. degrees C (under 10 MPa pressure). The contact area is 165 mm x 203 mm. That makes the thermal resistance of the interface 0.0025 degrees C/watt. Just like the thermal resistance of the copper heat spreader, we can ignore this too.

Finally, the thermal conductivity of the FET to heatsink. After reading a variety of semiconductor manufacturers app notes (most notably NXP AN3263 and Infineon AN 3263-12 v1), this is my summary of the data and the analysis (with some assumptions stated as such):

NXP recommends using 4-40 hardware (with specific washer and lock washer dimensions) for mounting hardware. This is consistent with mounting hole size of the MRF300 T-247 package.
Infineon, in their application note sets the torque limit for this package in the rage of 0.6 to 1.0 Nm, optimally, 0.8 Nm.
Engineers Edge website has a torque to force calculator. Note that it has unites of length in the CGS system and units of force in the MKS (odd). It gives the force generated by 0.8 Nm through a 4-40 screw at 1,400 N.
From the TO-247 drawing (all the way in the back of the MRF300 data sheet), the calculated net area of the MRF300 (metal and plastic) is 290 square millimeters. That translates to a force of 4.8 MPa.
I have to make an assumption about the nature of the MRF300 metal back and the copper heat spreader (there is a big difference between a ground and a milled surfaces). I am going to assume that a milled interface with thermal compound razored (this is discussed in one of the NXP app notes) approximates a ground surface interface.
With this assumption, the thermal conductivity of the case to heat spreader is 42,000 watts/meter squared degrees C. This is also from the Engineers Edge website.
The metal to metal contact area between the MRF300 package and the heat spreader is 118.8 square millimeters.
That translates into a case to heat spreader thermal resistance of thermal resistance 0.2 degrees C per watt.

Clearly, there are some assumptions here that need to be tested, but it is a start.

So the sum total of all thermal resistances is 0.55 + 0.2 + 0.2 = 0.95. With the maximum temperature rise of 150 degrees, this permits a dissipation of 160 watts.

From simulated results, there are multiple instances where the per transistor power dissipation exceeds 160 watts when delivering 500 watts of power to the load, key down. Simulation results with an LC matching network brings down the power dissipation per transistor under 175 watts. Also, with the Mean Well power supplies, it is possible to crank down the voltage to around 44 volts or so and that will help improve the efficiency.

But, hardly any commercial manufacturer makes a linear amplifier that runs at full rated power key down. So, this might be an ok design.

Controlling the Input Power:

The simulation shows that the input voltage from a 50 ohm source must be 24 volts peak (or around 11.75 volts into the simulated amplifier input impedance) to produce around 500 watts of power output. The output of the Ten Tec must be dialed back to this level. With the power amplifier on but not enabled, this will appear at the output of the power amp and can be measured by the directional coupler. Using the calculations of Part 4, this is -14.4 dBm which is well within the sensitivity of the measurement circuit. After power up and each band switch, the software will ask the operator to go through a set up routine to adjust the Ten Tec to deliver the required level. After that, the forward, reflected, power supply current, and SWR trips protect the amplifier against being overdriven.

Simulation Model

Simulation Netlist

* /Users/me/Documents/hamradio/Simulation/PA4-filtered.asc L1 N006 N015 1µ L2 N015 N017 1µ L3 s0 0 36µ V1 N007 0 SINE(0 1.25 28Meg) R1 0 N015 4.7 C1 N004 N006 0.1µ C2 N020 N017 0.1µ V2 N003 0 3 V3 N025 0 3 R2 N003 N005 4 R4 N021 N025 4 C3 g2 0 400p R3 N013 N012 20 R5 N019 N018 20 T1 dd1 dd2 N008 N014 Td=1.8n Z0=17 T2 dd1 dd2 N014 N016 Td=1.8n Z0=17 R6 ll1 0 50 V4 N002 0 48 C5 N002 0 10µ C6 N001 0 10µ R7 N002 N001 2.2 L7 N001 N002 10µ Rser=0.1 C8 dd1 0 100p C9 g1 dd1 2p C10 g2 dd2 2p L4 N001 dd1 10µ L5 dd2 N001 10µ L6 N019 N013 1.84µ D1 0 dd1 D D2 0 dd2 D C7 dd2 0 100p C4 g1 0 400p R8 s0 N007 50 C11 Vout N008 300n C12 0 N022 400n B1 dd1 0 I = u(v(g1)-3)*((28*uramp(v(g1)-3))+.2)+(u(v(g1)-1.7)-u(v(g1)-3))*(0.1538*uramp(v(g1)-1.7)) B2 dd2 0 I = u(v(g2)-3)*((28*uramp(v(g2)-3))+.2)+(u(v(g2)-1.7)-u(v(g2)-3))*(0.1538*uramp(v(g2)-1.7)) R9 N005 N004 4 R10 N021 N020 4 T3 dd1 dd2 N016 N022 Td=1.8n Z0=17 L8 N006 N012 0.00116µ L9 N017 N018 0.00116µ L10 N005 g1 0.00012µ L11 N021 g2 0.00012µ C14 Vout 0 68p C15 N009 0 150p C16 N010 0 150p L12 N010 N011 300n L13 Vout N009 300n L14 N009 N010 330n L17 N011 N023 75n L18 0 N024 46.88µ L19 0 N023 46.88µ L20 N026 N024 75n C13 N011 0 68p R16 N024 0 100 R25 N026 0 100 R12 Vinc 0 69.8 R14 N027 Vinc 154 R11 N024 N028 50 R13 N028 0 68.1 R15 N028 Vref 75 R17 Vref 0 150 R18 N026 N027 50 R19 N027 0 68.1 C19 0 N003 0.1µ C20 0 N025 0.1µ T4 N023 0 ll1 0 Td=410n Z0=50 .model D D .lib /Users/me/Library/Application Support/LTspice/lib/cmp/standard.dio Kfb1 L4 L5 1 Kfb2 L4 L6 1 Kfb3 L5 L6 1 Ks1 L1 L2 1 Ks2 L1 L3 1 Ks3 L2 L3 1 *.dc v2 2.9 3.1 0.01 .TRAN 1n 100.3u 100u *.four 3.5Meg v(ll1) Kcurrent L17 L18 1 Kvoltage L19 L20 1 .backanno .end